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SL2150F
Front End Power Splitter with AGC Data Sheet
Features
* Single chip quadruple power splitter (primary channel, secondary channel, OOB channel and loop through) Wide dynamic range on all channels Independent AGC facility incorporated into all channel paths CSO, CTB, CXM all better than -62dBc for +3dBmV agc attack point Full ESD protection. (Normal ESD handling procedures should be observed)
DS5535 Issue 2.1 April 2002
Ordering Information SL2150F/KG/LH2S (tubes) SL2150F/KG/LH2T (tape and reel)
* * * * *
Description
The SL2150F is a wide dynamic range single chip power splitter for cable set top box multi-tuner applications. The device offers four buffered outputs from a single input. All signal paths contain an independently controllable AGC facility.
Applications
* * * Multi-tuner cable set top box and cable modem applications Data communications systems Terrestrial TV tuner loop though
AGC1
AGC2
AGC3
AGC4
AGC Control
RFOUT1 RFOUT1B
AGC Control RFINPUT RFINPUTB Power Splitter AGC Control
RFOUT2 RFOUT2B
RFOUT3 RFOUT3B
AGC Control
RFOUT4 RFOUT4B
Figure 1 - SL2150F Block Diagram
SEMICMF.019
1
SL2150F
FROUT1B RFOUT2B RFOUT1 RFOUT2
Data Sheet
NC#
NC#
Vee Vee RFOUT4 RFOUT4B Vcc Vcc Vcc VEE (PACKAGE PADDLE) 1 Vcc Vcc AGC1 RF INPUT RF INPUT AGC2 Vee SL2150F
NC#
Vee Vee RFOUT3 RFOUT3B NC# AGC4 AGC3
LH28
# Pins marked NC should be connected to Vee
Figure 2 - Pin Allocation
1.0
Quick Reference Data
NB all data applies with differential termination and single ended source both of 75. Characteristics RF input operating range Conversion gain, with external load as in Figure 12 maximum minimum Input NF, all signal paths at maximum conversion gain IPIP3, all paths IPIP2, all paths CTB* CSO* CXM* Input impedance Input VSWR Output impedance differential, all loops (requires external load for example as in Figure 12) Input to output isolation (all loops) Output to output isolation (all loops) Table 1 - Quick Reference Data
*132 channel matrix at +15 dBmV per channel, 75 source impedance, all paths, max gain.
Units 50-860 5.5 -25 7 127 151 -66 -64 -66 75 8 440 30 25 MHz dB dB dB dBV dBV dBc dBc dBc dB dB dB
2
SEMICMF.019
Data Sheet
2.0 Functional Description
SL2150F
The SL2150F is a broadband wide dynamic range power splitter with AGC and is optimized for application in multi tuner cable set top box applications. It also has application in any system where a wide dynamic range broadband power splitter is required. The pin assignment is contained in Figure 2 and the block diagram in Figure 1. The port internal peripheral circuits are contained in Figure 15 - "Port Peripheral Circuitry". In normal application the RF input is interfaced to the device input. The input preamplifier is designed for low noise figure, within the operating region of 50 to 860 MHz and for high intermodulation distortion intercept so offering good signal to noise plus composite distortion spurious performance when loaded with a multi carrier system. The preamplifier when combined with the input network shown in Figure 3 - "RF Input Matching Network" provides an impedance match to a 75 source. The typical impedance is shown in Figure 4 - "Typical Single-Ended RF Input Impedance with Input Match". The input NF and input referred two-tone intermodulation test condition spectrum are shown in Figure 5 - "Input NF at 25 deg C" and Figure 6 - "Two Tone Intermodulation Test Condition Spectrum, Input Referred" respectively. The output of the preamplifier is then power split to four independently controlled AGC stages. Each AGC stage provides for a minimum of 30 dB of gain control across the input frequency range. The typical AGC characteristic and NF versus gain setting are contained in Figure 7 - "Typical AGC versus Control Voltage Characteristic" and Figure 8 - "Typical Variation in NF versus Gain Setting" respectively. The input referred third order intercept point is independent of gain setting. Finally, each of the AGC stages drive an output buffer of nominal differential output impedance of 440, which provides a nominal 5.5 dB of conversion gain when terminated into a differential 75 load. In application it is important to avoid saturation of the output stage, therefore it is recommended that the output standing current be sunk to Vcc through an inductor. A resistive pull up can also be used as shown in Figure 14 "Example Application Driving 200 Ohm Load with Resistive Pull Up", however the resistor values should not exceed 38 ohm single ended. If an inductive current sink is used the maximum available gain from the device is circa 20 dB. This gain can be reduced by application of an external load between the differential output ports. The gain can be approximately calculated from the following formula: GAIN = 20*log ((Parallel combination of 440 ohm and external load between ports) / 44 ohm) + 2dB For example, when driving a 200 ohm load as in Figure 13 - "Example Application Driving 200 Ohm Load with Inductive Pull Up", the gain equals Gain = 20 *log ((440 * 200)/(440+200)/44) +2dB = 12dB.
SEMICMF.019
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SL2150F
1nF 3
Data Sheet
RF INPUT SL2150F
RFIN F TYPE 5.1nH
1nF
4 RF INPUTB MABAES0029 1:1
Figure 3 - RF Input Matching Network
CH1
S11
1 U FS
4_: 133.23
16 Nov 2001 10:10:47 55.758 10.44 nH 850.000 000 MHz
PRm Cor Avg 16 Smo
Z0 75
1_: 169.02 -44.117 50 MHz

2_: 49.916 -57.436 250 MHz 3_: 31.238 -5.5576 500 MHz
4
3
1
2
START 50.000 000 MHz
STOP 850.000 000 MHz
Figure 4 - Typical Single-Ended RF Input Impedance with Input Match
4
SEMICMF.019
Data Sheet
Input NF vs Frequency at 25 deg C (with matching network) 10.0 9.0 8.0 7.0 6.0 NF(dB) 5.0 4.0 3.0 2.0 1.0 0.0 0 100 200 300 400 Frequency (MHz) 500 600 700
SL2150F
800
900
Figure 5 - Input NF at 25 deg C
-15dBm INCIDENT POWER FROM 75 SOURCE
IIM2 -57dBc
IIM3 -66dBc
-72 dBm
-81 dBm df
f2-f1
f1-df
f1
f2
f2+df
Figure 6 - Two Tone Intermodulation Test Condition Spectrum, Input Referred
SEMICMF.019
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SL2150F
Typical Variation in Noise Figure vs. Gain Setting 0 0 0.5 1 1.5 2 2.5 3
Data Sheet
-10 Back Off from Maximum Gain Setting (dB)
-20
-30
-40
-50
-60
-70 AGC Input Voltage (V)
Figure 7 - Typical AGC versus Control Voltage Characteristic
Typical Variation in NF vs. Gain Setting (with Matching Network) 50.0
40.0
30.0 NF (dB) -
20.0
10.0
0.0 -40.0
-35.5
-30.0
-25.0
-20.0
-15.0 Gain (dB)
-10.0
-5.0
0.0
5.0
10.0
Figure 8 - Typical Variation in NF versus Gain Setting
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SEMICMF.019
Data Sheet
SL2150F
132 channel matrix 75 Ohm source, all channels at +15dbmV. Input and output conditions as in Figure 3 - "RF Input Matching Network" and Figure 12 - "Example Application Driving 75 Ohm Load" -50
-55
-60 CSO (dBc) CSO, CTB (dBC) -65 CTB (dBc)
-70
-75
--80 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2 -0
Back off from maximum gain (dB)
Figure 9 - Typical Variation in CSO and CTB versus Back Off from Maximum Gain
Driven output stage C D Directional coupler A B
50
Port 1
Monitored output stage C D Directional coupler phase relationship A C0 D 180 B 0 0 Directional coupler A B 50
Network Analyzer Port 2
Figure 10 - Test Condition for Output Crosstalk
SEMICMF.019
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SL2150F
Driven output stage C D Directional coupler A B Port 1
Data Sheet
50
Monitored input stage
Network Analyzer Port 2
Directional coupler phase relationship A B C0 0 D 180 0
Figure 11 - Test Condition for Output to Input Crosstalk
Vcc 100nF 100pF
SL2150F
MABAES0029 1:1 1nF
To 75 load
FTYPE
Figure 12 - Example Application Driving 75 Ohm Load
Vcc
10H
10H
1nF SL2150F 200
1nF
Figure 13 - Example Application Driving 200 Ohm Load with Inductive Pull Up
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SEMICMF.019
Data Sheet
Vcc 2x 38
SL2150F
1nF SL2150F Note: External resistor values must not exceed 38 200
1nF
Figure 14 - Example Application Driving 200 Ohm Load with Resistive Pull Up
Vcc
INPUT
INPUT DECOUPLED
220
220 Output 2.5V
1k
270 3.9V 2.5V
1k
16 mA
16 mA
Output Ports 30 k 1.6V 1.5k AGC INPUT
RF Input Port
AGC Port
Figure 15 - Port Peripheral Circuitry
SEMICMF.019
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SL2150F
3.0 Electrical Characteristics
Test conditions (unless otherwise stated) T amb = -40o to 85o C, Vee=0V, Vcc=5V+-5%.
Data Sheet
These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage unless otherwise stated.
Electrical Characteristics
Characteristic Supply current Input frequency range Input impedance Input return loss Input Noise Figure 3, 4 50 75 8 8 pin min typ 190 max 228 860 units mA MHz dB dB Tamb=270C, see Figure 8 All loops at maximum conversion gain See Figure 4 Power gain from 75 single ended source to differential 75 load. 4 5.5 -65 7 -25 dB dB dB Vagcip=3.0V Vagcip=0.5V Vagcip=Vee AGC monotonic from Vee to Vcc. Refer to Functional description section for information on calculating maximum gain with other load conditions Assuming ideal power match. See note 2 and Figure 6. Assuming ideal power match. See note 2 and Figure 6. See note 2 and Figure 6. See note 3 and Figure 6. See Figure 4 Conditions
Variation in NF with gain adjust Gain
-1
dB/dB
maximum minimum minimum
Input referred IP2
42
dBm
Input referred IP3
18
dBm
Input referred IM2
-57 -37
dBc dBc
10
SEMICMF.019
Data Sheet
Electrical Characteristics (continued)
Characteristic Input referred IM3 pin min typ max -66 -46 -62 -64 -64 +4.5 units dBc dBc dBc dBc dBc dBm
SL2150F
Conditions See note 2 and Figure 6. See note 3 and Figure 6. All gain settings See note 4 and Figure 9. See note 4. See note 4. All gain settings, with load as in Figure 12 - "Example Application Driving 75 Ohm Load" Channel bandwidth 8 MHz within operating frequency range, all loops, all gain settings Differential
CSO CTB CXM Input P1dB
Gain variation within channel
0.25
dB
Output impedance
11,12, 15,16 20,21 24,25 11,12, 15,16 20,21 24,25 6,7 8,9 -150
440
Output port DC standing current
25
mA
Standing current that any external load has to sustain.
AGC input leakage current Crosstalk between all loop outputs
150 -25
A dB
Vagcip =Vee to Vcc, all control inputs. All gain settings, measured differential output to differential output, driven ports in phase and monitored ports out of phase, see Figure 10 - "Test Condition for Output Crosstalk". All gain settings, measured differential output to single ended input, driven ports in phase, see Figure 11 - "Test Condition for Output to Input Crosstalk"
Crosstalk between outputs and RF input
-30
dB
Note 1: Note 2: Note 3: Note 4:
All power levels are referred to 75 and 0 dBm = 109 dBV. Any two tones within RF operating range at -15 dBm, from single-ended 75 ohm source into differential 75 load as in Figure 12 - "Example Application Driving 75 Ohm Load", gain setting between maximum and -15dB backoff. Any two tones within RF operating range at -5 dBm, from single-ended 75 ohm source into differential 75 load as in Figure 12 - "Example Application Driving 75 Ohm Load". Load as in Figure 12 - "Example Application Driving 75 Ohm Load" and Figure 13 - "Example Application Driving 200 Ohm Load with Inductive Pull Up", max gain, 132 channel matrix, 75 ohm source with all channels at +15 dBmV, assuming power match.
SEMICMF.019
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SL2150F
Absolute Maximum Ratings All voltages are referred to Vee at 0V
Characteristic Supply voltage RF input voltage All I/O port DC offsets Storage temperature Junction temperature Package thermal resistance, chip to ambient Power consumption at 5.25V ESD protection 1.5 -0.3 -55 min -0.3 max 6 8 Vcc+0.3 150 125 35 1200
o
Data Sheet
units V dBm V
o o
Conditions
Differential
C C Power applied Paddle to be soldered to ground plane
C/W
mW kV Mil-std 883B method 3015 cat1
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SEMICMF.019
Data Sheet
4.0 SL2150F Demonstration Board
SL2150F
The SL2150F demonstration board is designed to allow testing of device functionality as a stand alone power splitter. It allows for testing of the AGC function and independent testing of all channels. The SL2150F is designed to interface differentially into a silicon tuner such as the SL2101 with simple inductive or resistive pull-ups. However, to facilitate testing the differential, output is converted to a single ended signal through a balun. The differential conversion is necessary for achieving second order performance. All outputs require a DC return path to Vcc to prevent output saturation. This can be provided by the balun, inductive pull up or resistive pull up. In the case of a resistive pull up, the maximum load value is 38 . The balun also provides the DC bias to the outputs; all outputs have to be DC 'shorted' to Vcc to prevent saturation of the output stages. All input and output terminations are 75 . The board schematic and layout are contained in Figure 19 - "Test Board Schematic" and Figure 20 - "Test Board Layout" respectively. Operation note The supply voltage must be connected and enabled before any AGC voltage is applied unless the AGC supplies are current limited to <1 mA or else permanent damage may occur through the ESD structures on the device.
4.1
Pin Connections
All references are with the board oriented as in bottom view on Figure 1 - "SL2150F Block Diagram". Pin 1 of the header is defined as the left-hand pin.
4.2
Power Supply
A single 5V supply is required. Power is supplied through the two-pin header PL1, located top right hand corner. Pin 1 2 Function Vcc Vee
4.3
RF Input
The RF input F type, SK1, is located on the right hand side of the board.
4.4
RF Outputs
Output 1 is the upper of the two F type connectors, SK3, located on the left-hand side. Output 2 is the lower of the two F type connector, SK4, located on the left-hand side. Output 3 is the F type connector, SK5, located at the bottom of the board Output 4 is the F type connector, SK2, located at the top of the board.
SEMICMF.019
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SL2150F
4.5 AGC Control
Data Sheet
All AGCs are connected through the 5-pin header, PL2, located in the bottom right hand corner. See note on connection of supplies in the power supply section. Pin allocation is as follows:
Pin 1 2 3 4 5
Function Vagc1 Vagc 2 Vagc 3 Vagc 4 Vee
AGC control voltage is Vee to 3V for minimum to maximum gain setting.
4.6 4.6.1
Test Procedure CSO
CSO is tested using an RDL matrix generator set to deliver all channels from 55.25 MHz to 859.25 MHz at 15 dBmV per carrier. Each output is tested independently over maximum gain setting through 15 dB of gain reduction. The output intermodulation is monitored on a spectrum analyzer with video bandwidth of 1 kHz and resolution bandwidth of 10 kHz. To avoid intermodulation in the test set up the output channel is filtered through a narrow band filter and then amplified to compensate for insertion loss. The higher of all CSO beats is recorded. Under gain reduction the amplitude is normalized to channel 2 output at the required AGC onset
4.6.2
CTB
CTB is tested using an RDL matrix generator set to deliver all channels from 55.25 MHz to 859.25 MHz at 15 dBmV per carrier. Each output is tested independently over maximum gain setting through 15 dB of gain reduction. The output intermodulation is monitored on a spectrum analyzer with video bandwidth of 1 kHz and resolution bandwidth of 10 kHz. To minimize intermodulation in the test set up the output channel is filtered through a narrow band filter and then amplified to compensate for insertion loss. CTB is measured with N+-1 also disabled since these channels were found to produce intermodulation in the filter and the post amplifier. Under gain reduction the amplitude is normalized to channel 2 output at the required AGC onset.
4.6.3
CXM
CTB is tested using an RDL matrix generator set to deliver all channels from 55.25 MHz to 859.25 MHz at 15 dBmV per carrier with 100% modulation at line rate. Each output is tested independently over maximum gain setting through 15 dB of gain reduction.
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SEMICMF.019
Data Sheet
SL2150F
To minimize crossmodulation in the test set up the output channel is filtered through a narrow band filter and then amplified to compensate for insertion loss. The amplifier output is then demodulated on a first spectrum analyzer set to linear mode with maximum resolution and video bandwidth. The video out of the first spectrum analyzer, which will be the demodulated AM on the carrier, is connected to a second spectrum analyzer centred on line rate frequency with video averaging enabled. The cross modulation can then be monitored on the second spectrum analyzer. The CXM is measured with modulation disabled on N+-1 since these channels were found to produce crossmodulation in the filter and the post amplifier. Under gain reduction the amplitude is normalized to channel 2 output at the required AGC onset.
4.6.4
Gain
Gain is measured using a network analyzer with 50/75 pads to ensure correct source and load impedance.
4.6.5
AGC
Output amplitude at a given channel is measured on a spectrum analyzer with all AGC settings from 0V to Vcc.
4.6.6
S11
S11 is measured at the test board RF input F type connector, using a network analyzer calibrated to 75 F type connector.
4.6.7
S22
S22 is not measured since the device is not designed to be impedance matched on its output. Rather the output load is used as the terminating impedance for the device.
4.6.8
NF
NF is measured using a NF meter with a 50/75 pad on the input.
4.7
Typical performance characteristics
9
8
7
6 Gain/NF in dB
5
4
3
NF gain
2
1
0 0 100 200 300 400 500 600 700 800 900 Input frequency
Figure 16 - SL2150F NF and Gain at Maximum Gain Setting
SEMICMF.019
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SL2150F
-16 -14 -12 -10 -8 -6 -4 -2
Data Sheet
-64 0 -64.5 -65 op4-Balun op1-Balun op2-Balun op3-Balun -65.5 -66 -66.5 -67 -67.5 -68 -68.5 -69 Gain back off (in dB)
CTB (in dBc)
Figure 17 - SL2150F CTB at 505.25 MHz Measured with 15dBmV per Carrier
-62 -16 -14 -12 -10 -8 -6 -4 -2 -64 0
-66
CSO (in dBc)
-68
-70
op4-Balun op1-Balun op2-Balun op3-Balun
-72
-74
-76 Gain back off (in dB)
Figure 18 - SL2150F CSO at 859.25 MHz Measured with 15 dBmV per Carrier
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SEMICMF.019
4.8
2 1
28 27 26 25 24 23 22
Vcc Vcc Vcc RFOUT4B RFOUT4 Vee Vee
AGC3 AGC4 Vee RFOUT3B RFOUT3 Vee Vee
C13 C10 1 2 3 4 5 C12 MOLEX5 C15 100nF C14 100nF 100nF
100nF 3 TX4 MABAES0029 1 4 5
8 9 10 11 12 13 14
SEMICMF.019
Data Sheet
PL1 MOLEX2
Vcc
5 C1 C2 MABAES0029 4 100nF 100nF 100nF C6 C7 IC1 CNR Corner 4 TX5 4 5 TX2 MABAES0029 1 Vcc 3 TX3 MABAES0029 1 PAD C25 1nF SL2150F 4 5 3 Vcc 100nF 100nF 1 Vcc C27 470nF C3 C4 100nF TX1
Evaluation Board
3
C23 1nF C5 100nF C30 100pF
SK2 FTYPE
C24 1nF
SK3 FTYPE C31 100pF C8 100nF
C19 1nF 1
L1 5 MABAES0029 Paddle
C20 1nF 3
SK1 FTYPE
5.1nH
1 2 3 4 5 6 7 Vcc Vcc RFINPUTB RFINPUT Vee AGC1 AGC2 RFOUT1B RFOUT1 Vee Vee Vee RFOUT2 RFOUT2B
21 20 19 18 17 16 15
C9 100nF C32 100pF SK4 FTYPE
C11 100nF
Figure 19 - "Test Board Schematic" and Figure 20 - "Test Board Layout" show schematic and PCB layout for a 4 layer evaluation board.
Figure 19 - Test Board Schematic
PL2 C16 C17 100nF 100nF 100nF
Vcc
C33 100pF C18 100nF C26 1nF SK5 FTYPE
SL2150F
17
SL2150F
Top
Data Sheet
LHS Bottom Top View
Figure 20 - Test Board Layout
RHS
Bottom View
18
SEMICMF.019
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